The present disclosure relates to a thin film transistor equipped with an organic semiconductor layer, a method of manufacturing the thin film transistor, a display device that uses the thin film transistor, and electronic equipment that uses the thin film transistor.
In a thin film transistor that uses an organic semiconductor layer, it is important to promote a reduction in contact resistance between the organic semiconductor layer and a source electrode/a drain electrode in realizing a high ON current and a steep sub-threshold slope.
Thus, in a thin film transistor of a p channel type of a top contact and bottom gate structure; on the organic semiconductor later, a source electrode/a drain electrode is provided in which an interfacial layer formed of an acceptor material such as molybdenum oxide (MoOx) and a conductive layer are stacked in this order. As a result, a configuration is suggested which promotes a reduction in contact resistance between the organic semiconductor layer and the source electrode/drain electrode (see “APPLIED PHYSICS LETTERS 94”, (2009), p. 143304-1 to p. 143304-3).
Furthermore, in the thin film transistor of a p channel type of the bottom contact and bottom gate structure, on a gate insulating film, the source electrode/the drain electrode are provided in which the interfacial layer formed of the acceptor material and the conductive layer as above are stacked in this order. Moreover, an organic semiconductor layer is provided on a gate insulating film between the source electrode and the drain electrode. As a result, a configuration is suggested in which the interfacial layer is disposed adjacent to the channel region in the organic semiconductor layer, thereby promoting a reduction in contact resistance of the source electrode/drain electrode in regard to the channel region (see Japanese Unexamined Patent Application Publication No. 2008-243911).